MPEG-2 HD Decoder IP core

2DC-VA-MPEG2-8B-30-1080-IP-ZL


Description

System-On-Chip Technologies' IP cores are known for ultra-low latency, low power-consumption, and precise video quality. Customers from over 20 countries rely on SOC high-performance IP cores for reliable, high-efficiency all-hardware MPEG video coding.

Specifications
Compression Standard : MPEG-2
Codec Function : Decoding
Channels : Two
Max. Resolution : Up to FHD/1080p (1920x1080)
Max. Framerate : Up to 30 FPS (30/29.97, 25/24.97, 24/23.98...)
Audio Capability : AAC, MPEG2-LayerII Audio
Precision : 8 bits per channel
Latency : Zero Latency (0.25ms)
Architecture : All-hardware-logic

Learn More

Standard:
MPEG-2
MPEG-2 is the first-generation MPEG Codec Specification. Although the MPEG-2 compression efficiency has been largely superceded by the newer H.264 and H.265 standards, many organizations still rely on on the MPEG-2 standard.
Codec:
Decoder
A decoding system receives compressed Transport/Elementary/Program Stream(s) from a source over UDP, and decode it into raw HDMI/SDI video for a display.
Channels:
Two
Supports encoding/decoding of up to 2 input/output channels at the specified resolution and frame-rate.
Resolution:
HD
1080p Full-HD Codecs (FHD) are optimized to process frames up to 1920 pixels wide and 1080 pixels high. Resolutions exceeding these limits may be prepared by special request.
FPS:
30fps
30fps supports frame-rates up to 30fps including FPS/1.001 (29.97, 24.97, 23.98, etc.)
Audio:
Video/Audio
Video-Audio Codecs process both video and audio data. Audio data is encoded/decoded as AAC or MPEG2-LayerII.
Precision:
8 bits
8-bit is the most common color precision. A balance of compression and quality, sufficient for most applications.
Latency:
Zero Latency
The zero-latency line produce the minimum latency. ZL cores encode/decode data at approximately 0.25ms at 60fps. An end-to-end latency of less than 1/4 of a frame is achieable under controlled conditions. 1-1.5 frame latency is achievable under normal conditions.
Architecture:
All-hardware-logic
SOC Technologies' IP cores are based on single-clock driven, all-hardware-logic architecture with no processors, software, or DSP processors.


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