Datasheet
H.264 HD Encoder Codec Module
ec-va-h264-8b-30-1080-m-sl
MCM Codec Modules Overview

SOC Mpeg Codec Modules (MCMs) are small yet powerful video processing PCBs designed to reduce the engineering effort needed to make use of our low-latency all-hardware video/audio Codec IP.

MCM Modules are built with all the IC and interfaces that our Codec IP cores need to process real-time video:

  • a high-performance Xilinx/Intel FPGA/SoC
  • DDR memory
  • Flash/EEPROM
  • Audio-codec capabilites
  • Run-time API interface

MCM modules are pre-loaded with firmware according to customer specifications. They are shipped as ready to use, plug-in-and-play Codec processing systems.

To use MCM modules, add a 204-pin card connector on your PCB, and you are ready to encode/decode/transcode up to 4K/60 video (3840x2160 at 60fps), at ultra-low latencies (as low as 0.25ms!).

Product Overview
Edge-connector Card Interface

MCM Modules interface to user PCBs via a standard 204-pin SODIMM connector. You may recognize this connector as the DDR3 SDRAM connector used for connecting high-speed RAM to PCs. Coincidentally, this connector is also well-suited for streaming uncompressed and compressed video data.

You may purchase this connector from various electronics parts suppliers:

MM80 Series Inline Module Socket Connector
Manufacturer: JAE Electronics
Mouser - MM80-204B1-1
204-pin DDR3 SDRAM SODIMM Connector
Manufacturer: TE Connectivity AMP Connectors
DigiKey - 2-2013289-1
Edge Connector Signals

Working reference designs may be licensed from System-On-Chip Technologies.

Edge PadSignalDirection
59HDMII_D[0]I
61HDMII_D[1]I
63USR_DATA_IN[0]I
65USR_DATA_IN[1]I
67USR_DATA_IN_DVI
69HDMII_SPDIFI
77HDMII_D[2]I
79HDMII_D[3]I
80HDMII_D[4]I
81HDMII_D[5]I
82HDMII_D[6]I
83HDMII_D[7]I
84HDMII_D[8]I
85HDMII_D[9]I
86HDMII_D[10]I
87HDMII_D[11]I
Edge PadSignalDirection
88HDMII_D[12]I
90HDMII_D[13]I
105HDMII_CLKI
107EXT_RSTI
113TS_CLKO
115USR_IN_CLKI
116TS_SYNCO
118TS_RDYI
121HDMII_D[14]I
123HDMII_D[15]I
124TS_DATA[0]O
125HDMII_D[16]I
126TS_DATA[1]O
127HDMII_D[17]I
128TS_DATA[2]O
130TS_DATA[3]O
Edge PadSignalDirection
131TS_DATA[6]O
132TS_DATA[4]O
133TS_DATA[7]O
134TS_DATA[5]O
135TS_DATA_DVO
137UART_TXDO
143TS_USR_DATA_DVO
145USR_FLASH_IN_DVO
153HDMII_VSI
155HDMII_HSI
156HDMII_D[18]I
157HDMII_DEI
158HDMII_D[19]I
161UART_RXDI
Uncompressed Video Signals
HD video signals

Video data is transferred on the HDMI_D[] data bus. Vertical sync and horizontal sync signals are used for frame synchronization.

10-bit capable systems use 10 bits per channel, 8-bit systems ignore the 2 lowest bits [1:0] (they can be set to '0').

Signal NameDir.Description
HDMI_CLKOVideo Clock
HDMI_D[17:0]OHDMI Luma and Chroma Data
Video Clock

VIDEO_CLK is driven by the video source (usually HDMI or SDI chipset). VIDEO_CLK frequency should be set according to the resolution and framerate of the video source:

Resolution /FPSClock Frequency
640x480p 60fps27 Mhz
1280x720p 60fps74.25 Mhz
1920x1080p 30fps74.25 Mhz
1920x1080p 60fps148.5 Mhz
Compressed Data Stream Signals

Compressed data is transferred as an 8-bit stream over TS_BYTE[7:0] lines. At every rising edge of TS_CLK, if TS_DV is '1', this means that the current data on the TS_DATA bus is valid for reading.

Signal NameDir.Description
TS_CLKOStream Clock
TS_RDYIReceiver Ready
TS_DVOData Valid
TS_BYTE[7:0]OStream Data
UART Signals (API)

Modules expose a serial UART interface for reading/writing API registers. For a list of available API registers, refer to the API Guide.

Signal NameDir.Description
UART_RXIUART data to module
UART_TXOUART data from module

The standard UART protocol uses these parameters:

BaudrateData bitsStart bitsStop bitsParity bits
1152008110
Voltage Requirements

Working reference designs may be licensed from System-On-Chip Technologies.

Edge PadVoltage
1VCC_3V3
2GND
3VCC_3V3
4GND
5VCC_3V3
6GND
7VCC_3V3
8GND
9VCC_3V3
10VCC_1V2
11VCC_3V3
12VCC_1V2
13VCC_3V3
14VCC_1V2
15VCC_3V3
16VCC_1V2
17GND
18GND
19NC
20GND
21NC
22VCC_1V5
23NC
24VCC_1V5
25NC
26VCC_1V5
27IO_1V5
28VCC_1V5
29IO_1V5
30VCC_1V5
31IO_1V5
32VCC_1V5
33IO_1V5
34GND
Edge PadVoltage
35GND
36GND
37GND
38IO_3V3
39GND
40IO_3V3
41GND
42GND
43VCC_1V0
44GND
45VCC_1V0
46IO_1V5
47VCC_1V0
48IO_1V5
49VCC_1V0
50IO_3V3
51VCC_1V0
52IO_3V3
53VCC_1V0
54IO_3V3
55VCC_1V0
56IO_3V3
57VCC_1V0
58IO_3V3
59IO_3V3
60IO_3V3
61IO_3V3
62GND
63IO_1V5
64JTAG_TDI
65IO_1V5
66JTAG_TMS
67IO_1V5
68JTAG_TDO
Edge PadVoltage
69IO_1V5
70JTAG_TCK
71GND
72GND
73GND
74GND
75GND
76NC
77IO_3V3
78NC
79IO_3V3
80IO_3V3
81IO_3V3
82IO_3V3
83IO_3V3
84IO_3V3
85IO_3V3
86IO_3V3
87IO_3V3
88IO_3V3
89IO_3V3
90IO_3V3
91IO_3V3
92IO_3V3
93IO_3V3
94IO_3V3
95IO_3V3
96IO_3V3
97IO_3V3
98IO_3V3
99IO_3V3
100IO_3V3
101IO_3V3
102IO_3V3
Edge PadVoltage
103IO_3V3
104IO_3V3
105IO_3V3
106IO_3V3
107IO_3V3
108IO_3V3
109IO_3V3
110IO_3V3
111IO_3V3
112IO_3V3
113IO_3V3
114IO_3V3
115IO_3V3
116IO_1V5
117IO_3V3
118IO_1V5
119IO_3V3
120NC
121IO_3V3
122NC
123IO_3V3
124IO_1V5
125IO_3V3
126IO_1V5
127IO_3V3
128IO_1V5
129GND
130IO_1V5
131IO_1V5
132IO_1V5
133IO_1V5
134IO_1V5
135IO_1V5
136NC
Edge PadVoltage
137IO_1V5
138NC
139IO_3V3
140IO_3V3
141IO_3V3
142IO_3V3
143IO_1V5
144IO_3V3
145IO_1V5
146IO_3V3
147IO_1V5
148IO_3V3
149IO_1V5
150IO_3V3
151IO_1V5
152IO_3V3
153IO_1V5
154IO_3V3
155IO_1V5
156IO_3V3
157IO_1V5
158IO_3V3
159IO_1V5
160IO_3V3
161IO_1V5
162IO_3V3
163GND
164IO_3V3
165GND
166IO_3V3
167GND
168GND
169GND
170GND
Edge PadVoltage
171NC
172GND
173NC
174GND
175GND
176GND
177GND
178DSP_EMU#
179DSP_TMS
180DSP_TRST#
181DSP_TDO
182DSP_TCK
183DSP_TDI
184GND
185GND
186GND
187GND
188VCC_1V3
189VCC_2V5
190VCC_1V3
191VCC_2V5
192VCC_1V3
193VCC_2V5
194VCC_1V3
195VCC_2V5
196NC
197VCC_2V5
198NC
199VCC_2V5
200GND
201NC
202GND
203GND
204GND